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EL8188
Data Sheet August 25, 2005 FN7467.1
PRELIMINARY
Micropower Single Supply Rail-to-Rail Input-Output Op Amp
The EL8188 is a micropower operational amplifier optimized for single supply operation at 5V and can operate down to 2.4V. The EL8188 draws minimal supply current while meeting excellent DC-accuracy noise and output drive specifications. Competing devices seriously degrade these parameters to achieve micropower supply current. Offset current, voltage and current noise, slew rate, and gain-bandwidth product are all two to ten times better than on previous micropower op amps. The EL8188 can be operated from one lithium cell or two NiCd batteries. The input range includes both positive and negative rail. The output swings to both rails.
Features
* 50A supply current * 1mV typical offset voltage * 0.5 NA input bias current * 250kHz gain-bandwidth product * 0.13V/s slew rate * Single supply operation down to 2.4V * Rail-to-rail input and output * Output sources and sinks 26mA load current * Pb-Free plus anneal available (RoHS compliant)
Applications
* Battery- or solar-powered systems * 4mA to 25mA current loops
Ordering Information
PART NUMBER (BRAND) EL8188IW-T7 (BBKA) EL8188IW-T7A (BBKA) EL8188ISZ (See Note) EL8188ISZ-T7 (See Note) EL8188ISZ-T13 (See Note) PACKAGE 6-Pin SOT-23 6-Pin SOT-23 8-Pin SO (Pb-free) 8-Pin SO (Pb-free) 8-Pin SO (Pb-free) TAPE & REEL 7" (3K pcs) 7" (250 pcs) 7" 13" PKG. DWG. # MDP0038 MDP0038 MDP0027 MDP0027 MDP0027
* Handheld consumer products * Medical devices * Thermocouple amplifiers * Photodiode pre amps * pH probe amplifiers * Pressure sensor pre amp
Pinouts
EL8188 (6-PIN SOT-23) TOP VIEW
OUT 1 VS- 2 IN+ 3 +6 VS+ 5 ENABLE 4 IN-
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
EL8188 (8-PIN SO) TOP VIEW
NC 1 IN- 2 IN+ 3 VS- 4 + 8 ENABLE 7 VS+ 6 VOUT 5 NC
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2004, 2005. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
EL8188
Absolute Maximum Ratings (TA = 25C)
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VS + 0.5V ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2kV Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite Ambient Operating Temperature Range . . . . . . . . . .-40C to +85C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER VOS V OS --------------T IB eN CMIR CMRR PSRR AVOL
VS = 5V, 0V, VCM = 0.1V, VO = 1.4V, TA = 25C unless otherwise specified. CONDITIONS MIN TYP 1 EL8188IW EL8188IS 1.9 1.1 0.5 fO = 1kHz Guaranteed by CMRR test VCM = 0V to 5V VS = 3.3V to 5V VO = 0.5V to 4.5V, RL = 100k VO = 0.5V to 4.5V, RL = 1k 0 80 80 100 100 100 400 15 3 130 4.994 4.8 0.09 fO = 100kHz 40 4.997 4.88 0.13 250 50 3 RL = 10 RL = 10 18 17 31 26 2.2 2.4 2 0.8 VEN = 5V VEN = 0V 0.25 -0.5 0.7 0 2 +0.5 75 10 0.17 6 200 35 5 1 MAX 4 UNIT mV V/C V/C NA nV/Hz V dB dB V/mV V/mV mV mV V V V/s kHz A A mA mA V V V A A
DESCRIPTION Input Offset Voltage Input Offset Drift vs Temperature
Input Bias Current Input Noise Voltage Density Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain
VOUT
Maximum Output Voltage Swing
Output low, RL = 100k Output low, RL = 1k Output high, RL = 100k Output high, RL = 1k
SR GBW IS,ON IS,OFF IO+ IOVS VINH VINL IENH IENL
Slew Rate Gain Bandwidth Product Supply Current, Enabled Supply Current, Disabled Short Circuit Output Current Short Circuit Output Current Minimum Supply Voltage Enable Pin High Level Enable Pin Low Level Enable Pin Input Current Enable Pin Input Current
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FN7467.1 August 25, 2005
EL8188 Typical Performance Curves
1 80 70 0 GAIN (dB) VS = 1.25 -1 VS = 2.5V -2 VS = 1.0V -3 1K 10K 100K 1M 60 50 40 30 20 10 0 -10 -20 1 GAIN =1 V/V 10 100 1K 10K 100K 1M 10M GAIN = 10 GAIN = 5 GAIN = 2 Gain = 1K Gain = 500 GAIN = 200 GAIN = 100
MAGNITUDE (dB)
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 1. UNITY GAIN FREQUENCY RESPONSE vs SUPPLY VOLTAGE
FIGURE 2. FREQUENCY RESPONSE vs CLOSED LOOP GAIN
60 50 40 30 20 10 0 INPUT OFFSET VOLTAGE (V)
200
AV = -1 VCM = VDD/2
SUPPLY CURRENT (A)
100
0
-100
2
2.5
3
3.5
4
4.5
5
5.5
-200 -0.5
0.5
1.5
2.5
3.5
4.5
5.5
SUPPLY VOLTAGE (V)
OUTPUT VOLTAGE (V)
FIGURE 3. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 4. INPUT OFFSET VOLTAGE vs OUTPUT VOLTAGE
INPUT BIAS, OFFSET CURRENT (fA)
250 INPUT OFFSET VOLTAGE (V)
20 IOS IB0
150
10
50
-50
-150
-10
IB+
-250 -0.5
0.5
1.5
2.5
3.5
4.5
5.5
-20 -0.5
0.5
1.5
2.5
3.5
4.5
5.5
COMMON-MODE INPUT VOLTAGE (V)
COMMON-MODE INPUT VOLTAGE (V)
FIGURE 5. INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE
FIGURE 6. INPUT BIAS, OFFSET CURRENT vs COMMONMODE INPUT VOLTAGE
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FN7467.1 August 25, 2005
EL8188 Typical Performance Curves (Continued)
110 100 90 80 70 60 50 40 30 20 10 0 -10 -20 -30 -40 1 100 80 GAIN PHASE () GAIN (dB) 60 PHASE 40 20 0 -20 10 100 1K 10K 100K 1M -40 10M 110 100 90 80 70 60 50 40 30 20 10 0 -10 -20 -30 -40 100 80 60 PHASE 40 20 GAIN 0 -20 -40 10M PHASE ()
GAIN (dB)
1
10
100
1K
10K
100K
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 7. OPEN LOOP GAIN vs FREQUENCY @ 1k
FIGURE 8. OPEN LOOP GAIN AND PHASE vs FREQUENCY @ 100k
POWER SUPPLY REJECTION RATIO (dB)
120 100 80 60 40 20 0 1
10
100
1K
10K
100K
1M
120 110 100 90 80 70 60 50 40 30 20 10 0 -10 -20
PSRR+
CMRR (dB)
PSRR-
1
10
100
1K
10K
100K
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 9. CMRR vs FREQUENCY
FIGURE 10. PSRR vs FREQUENCY
1000
800 600
35 6-PIN SOT23 SAMPLES TYPICAL = 1.9V/C
VOLTAGE NOISE (nV/Hz)
400 100 VOS (V) 10 1 1 10 100 1K 10K 100K FREQUENCY (Hz) 200 0 -200 -400 -600 -800 -60 -40 -20 0 20 40 60 80 100 120
TEMPERATURE (C)
FIGURE 11. VOLTAGE NOISE
FIGURE 12. SOT VOS vs TEMPERATURE (VS = 5V)
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FN7467.1 August 25, 2005
EL8188 Typical Performance Curves (Continued)
400 300 200 VOS (V) 100 0 -100 -200 -300
35 SOIC SAMPLES TYPICAL = 1.1V/C POWER DISSIPATION (W)
1
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 909mW
J 8 /W SO 0C 1 =1
A
0.8
0.6 435mW 0.4
J
SO
A =2
30
T2 3 C
-6
0.2
/W
-400 -60
0 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C)
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (C)
FIGURE 13. SOIC VOS vs TEMPERATURE (VS = 5V)
FIGURE 14. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
0.7 POWER DISSIPATION (W)
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
0.6 625mW
J
0.5 0.4 391mW 0.3 0.2 0.1 0 0
8 /W SO 0C 6 =1
JA =
A
SO 25
T2 3-6 6 C/ W
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (C)
FIGURE 15. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
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FN7467.1 August 25, 2005
EL8188 Applications Information
Introduction
The EL8188 is a rail-to-rail input and output micro-power single supply operational amplifier with an enable feature. The device achieves rail-to-rail input and output operation and eliminates the concerns introduced by a conventional rail-to-rail I/O operational amplifier.
GENERAL PURPOSE COMBINATION pH PROBE
Typical Applications
V+ + EL8188 V-
+ 3V
COAX
Rail-to-Rail Input
The single PFET input stage of the EL8188 has an input common-mode voltage range that goes from negative supply to positive supply without introducing offset errors or degrading performance associated with a conventional railto-rail input operational amplifier. Many rail-to-rail input stages use dual differential input pairs, a long-tail PNP (or PFET) and an NPN (or NFET). Severe penalties have to be paid for this topology. As the input signal moves from one supply rail to another, the operational amplifier switches from one input pair to the other causing drastic changes in input offset voltage and an undesired change in magnitude and polarity of input offset current. The EL8188 achieves input rail-to-rail performance without sacrificing important precision specifications and without degrading distortion performance. The EL8188's input offset voltage exhibits a smooth behavior throughout the entire common-mode input range.
FIGURE 16. PH PROBE AMPLIFIER
A general-purpose combination pH probe has extremely high output impedance typically in the range of 10G to12G. Low loss and expensive Teflon cables are often used to connect the PH probe to the meter electronics. The above circuit provides a low-cost alternative solution using the EL8188 and a low-cost coax cable. The EL8188 PMOS high impedance input senses the pH probe output signal and buffers it to drive the coax cable. Its rail-to-rail input nature also eliminates the need for a bias resistor network required by other amplifiers in the same application.
R4 100k R3 R2 K TYPE THERMOCOUPLE 10k 10k V+ + EL8188 V-
+ 5V
410V/C
Rail-to-Rail Output
A pair of complementary MOSFET devices achieves rail-torail output swing. The NMOS sinks current to swing the output in the negative direction. The PMOS sources current to swing the output in the positive direction. The EL8188 with a 100k load will swing to within 3mV of the supply rails.
R1 100k
FIGURE 17. THERMOCOUPLE AMPLIFIER
Enable/Disable Feature
The EL8188 offers an EN pin. The active low enable pin disables the device when pulled up to at least 2.2V. Upon disable the part consumes typically 3A, while the output is in a high impedance state. The EN also has an internal pull down. If left open, the EN pin will pull to negative rail and the device will be enabled by default. The high impedance at output during disable allows multiple EL8188's to be connected together as a MUX. The outputs are tied together in parallel and a channel can be selected by the EN pin.
Thermocouples are the most popular temperature-sensing device because of their low cost, interchangeability, and ability to measure a wide range of temperatures. The EL8188 is used to convert the differential thermocouple voltage into single-ended signal with 10X gain. The EL8188's rail-to-rail input characteristic allows the thermocouple to be biased at ground and the converter to run from a single 5V supply.
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FN7467.1 August 25, 2005
EL8188 SO Package Outline Drawing
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FN7467.1 August 25, 2005
EL8188 SOT-23 Package Outline Drawing
NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at http://www.intersil.com/design/packages/index.asp
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 8
FN7467.1 August 25, 2005

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